HAL2 Migrator
LL USART APIs listing for migration ¶
There are a few API changes in the LL layer. This page lists only the modified LL APIs. Others not listed here are unchanged between HAL1 and HAL2.
LL USART constants ¶
|
HAL1 |
series |
HAL2 |
|---|---|---|
|
LL_USART_AUTOBAUD_DETECT_ON_STARTBIT |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_AUTO_BAUD_DETECT_ON_START_BIT |
|
LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_AUTO_BAUD_DETECT_ON_FALLING_EDGE |
|
LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_AUTO_BAUD_DETECT_ON_0X7F_FRAME |
|
LL_USART_AUTOBAUD_DETECT_ON_55_FRAME |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_AUTO_BAUD_DETECT_ON_0X55_FRAME |
|
LL_USART_ADDRESS_DETECT_4B |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_ADDRESS_DETECT_4_BIT |
|
LL_USART_ADDRESS_DETECT_7B |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_ADDRESS_DETECT_7_BIT |
|
LL_USART_IRDA_POWER_NORMAL |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_IRDA_POWER_MODE_NORMAL |
|
LL_USART_IRDA_POWER_LOW |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_IRDA_POWER_MODE_LOW |
|
LL_USART_LINBREAK_DETECT_10B |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_LIN_BREAK_DETECT_10_BIT |
|
LL_USART_LINBREAK_DETECT_11B |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_LIN_BREAK_DETECT_11_BIT |
|
LL_USART_STOPBITS_0_5 |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_STOP_BIT_0_5 |
|
LL_USART_STOPBITS_1 |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_STOP_BIT_1 |
|
LL_USART_STOPBITS_1_5 |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_STOP_BIT_1_5 |
|
LL_USART_STOPBITS_2 |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_STOP_BIT_2 |
|
LL_USART_GPDMA1_CH0_TCF_TRG |
u5 |
LL_USART_TRIG_GPDMA1_CH0_TC |
|
LL_USART_GPDMA1_CH1_TCF_TRG |
u5 |
LL_USART_TRIG_GPDMA1_CH1_TC |
|
LL_USART_SR_CTS |
f4 |
LL_USART_ISR_CTS |
|
LL_USART_SR_LBD |
f4 |
LL_USART_ISR_LBD |
|
LL_USART_SR_TXE |
f4 |
LL_USART_ISR_TXE |
|
LL_USART_SR_TC |
f4 |
LL_USART_ISR_TC |
|
LL_USART_SR_RXNE |
f4 |
LL_USART_ISR_RXNE |
|
LL_USART_ISR_TXE |
l4 |
Not implemented yet in HAL2. |
|
LL_USART_SR_IDLE |
f4 |
LL_USART_ISR_IDLE |
|
LL_USART_SR_ORE |
f4 |
LL_USART_ISR_ORE |
|
LL_USART_SR_NE |
f4 |
LL_USART_ISR_NE |
|
LL_USART_ISR_RXNE |
l4 |
LL_USART_ISR_NE |
|
LL_USART_SR_FE |
f4 |
LL_USART_ISR_FE |
|
LL_USART_SR_PE |
f4 |
LL_USART_ISR_PE |
|
LL_USART_CR1_TXEIE |
l4, f4 |
LL_USART_CR1_TXNEIE_TXFNEIE |
|
LL_USART_CR1_RXNEIE |
l4, f4 |
LL_USART_CR1_RXNEIE_RXFNEIE |
|
LL_USART_GPDMA1_CH2_TCF_TRG |
u5 |
LL_USART_TRIG_GPDMA1_CH2_TC |
|
LL_USART_GPDMA1_CH3_TCF_TRG |
u5 |
LL_USART_TRIG_GPDMA1_CH3_TC |
|
LL_USART_EXTI_LINE6_TRG |
u5 |
LL_USART_TRIG_EXTI6 |
|
LL_USART_EXTI_LINE9_TRG |
u5 |
LL_USART_TRIG_EXTI9 |
|
LL_USART_LPTIM1_OUT_TRG |
u5 |
LL_USART_TRIG_LPTIM1_CH1 |
|
LL_USART_LPTIM2_OUT_TRG |
u5 |
LL_USART_TRIG_LPTIM2_CH1 |
|
LL_USART_COMP1_OUT_TRG |
u5 |
LL_USART_TRIG_COMP1_OUT |
|
LL_USART_COMP2_OUT_TRG |
u5 |
LL_USART_TRIG_COMP2_OUT |
|
LL_USART_RTC_ALRA_TRG |
u5 |
LL_USART_TRIG_RTC_ALRA_TRG |
|
LL_USART_RTC_WUT_TRG |
u5 |
LL_USART_TRIG_RTC_WUT_TRG |
|
LL_USART_WAKEUP_IDLELINE |
u5, h5, c0, l4, g4, g0, f4 |
LL_USART_WAKEUP_METHOD_IDLE_LINE |
|
LL_USART_WAKEUP_ADDRESSMARK |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_WAKEUP_METHOD_ADDRESS_MARK |
|
LL_USART_DATAWIDTH_7B |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_DATAWIDTH_7_BIT |
|
LL_USART_DATAWIDTH_8B |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_DATAWIDTH_8_BIT |
|
LL_USART_CLOCK_DISABLE |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_CLOCK_OUTPUT_DISABLED |
|
LL_USART_CLOCK_ENABLE |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_CLOCK_OUTPUT_ENABLED |
|
LL_USART_LASTCLKPULSE_NO_OUTPUT |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_LASTCLKPULSE_DISABLED |
|
LL_USART_LASTCLKPULSE_OUTPUT |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_LASTCLKPULSE_ENABLED |
|
LL_USART_PHASE_1EDGE |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_PHASE_1_EDGE |
|
LL_USART_PHASE_2EDGE |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_PHASE_2_EDGE |
|
LL_USART_DATAWIDTH_9B |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_DATAWIDTH_9_BIT |
|
LL_USART_FIFOTHRESHOLD_8_8 |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_FIFO_THRESHOLD_8_8 |
|
LL_USART_FIFOTHRESHOLD_7_8 |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_FIFO_THRESHOLD_7_8 |
|
LL_USART_FIFOTHRESHOLD_1_8 |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_FIFO_THRESHOLD_1_8 |
|
LL_USART_FIFOTHRESHOLD_1_4 |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_FIFO_THRESHOLD_1_4 |
|
LL_USART_FIFOTHRESHOLD_1_2 |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_FIFO_THRESHOLD_1_2 |
|
LL_USART_FIFOTHRESHOLD_3_4 |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_FIFO_THRESHOLD_3_4 |
|
LL_USART_EnableIT_RXNE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_EnableIT_RXNE_RXFNE |
|
LL_USART_EnableIT_TXE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_EnableIT_TXE_TXFNF |
|
LL_USART_DisableIT_RXNE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_DisableIT_RXNE_RXFNE |
|
LL_USART_DisableIT_TXE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_DisableIT_TXE_TXFNF |
|
LL_USART_IsEnabledIT_RXNE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_IsEnabledIT_RXNE_RXFNE |
|
LL_USART_IsEnabledIT_TXE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_IsEnabledIT_TXE_TXFNF |
|
LL_USART_IsActiveFlag_TXE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_IsActiveFlag_TXE_TXFNF |
|
LL_USART_IsActiveFlag_RXNE |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_IsActiveFlag_RXNE_RXFNE |
|
LL_USART_BITORDER_LSBFIRST |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_BITORDER_LSB_FIRST |
|
LL_USART_BITORDER_MSBFIRST |
u5, h5, c0, l4, g4, g0, h7 |
LL_USART_BITORDER_MSB_FIRST |
|
LL_USART_POLARITY_HIGH |
u5, h5, c0, l4, g4, g0, h7, f4 |
LL_USART_CLOCK_POLARITY_HIGH |
|
LL_USART_POLARITY_LOW |
u5, h5, c0, l4, g4, g0, h7, f4 |
LL_USART_CLOCK_POLARITY_LOW |
LL USART macros ¶
|
HAL1 |
series |
HAL2 |
|---|---|---|
|
__LL_USART_DIVMANT_SAMPLING16 |
f4 |
LL_USART_DIVMANT_SAMPLING16 |
|
__LL_USART_DIV_SAMPLING8_100 |
f4 |
LL_USART_DIV_SAMPLING8_100 |
|
__LL_USART_DIV_SAMPLING8 |
u5, h5, c0, l4, g4, g0, f4 |
LL_USART_DIV_SAMPLING8 |
|
__LL_USART_DIVFRAQ_SAMPLING16 |
f4 |
LL_USART_DIVFRAQ_SAMPLING16 |
|
__LL_USART_DIV_SAMPLING16_100 |
f4 |
LL_USART_DIV_SAMPLING16_100 |
|
__LL_USART_DIVFRAQ_SAMPLING8 |
f4 |
LL_USART_DIVFRAQ_SAMPLING8 |
|
__LL_USART_DIVMANT_SAMPLING8 |
f4 |
LL_USART_DIVMANT_SAMPLING8 |
|
__LL_USART_DIV_SAMPLING16 |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_DIV_SAMPLING16 |
|
LL_USART_ReadReg |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_READ_REG |
|
LL_USART_WriteReg |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_WRITE_REG |
HAL USART structures ¶
|
HAL1 |
series |
HAL2 |
|---|---|---|
|
LL_USART_InitTypeDef |
u5, h5, c0, l4, g4, g0, f4, h7 |
|
|
LL_USART_ClockInitTypeDef |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL USART functions ¶
|
HAL1 |
series |
HAL2 |
|---|---|---|
|
LL_USART_DeInit |
u5, h5, c0, l4, g4, g0, f4, h7 |
|
|
LL_USART_Init |
u5, h5, c0, l4, g4, g0, f4, h7 |
|
|
LL_USART_StructInit |
u5, h5, c0, l4, g4, g0, f4, h7 |
|
|
LL_USART_ClockInit |
u5, h5, c0, l4, g4, g0, f4, h7 |
|
|
LL_USART_ClockStructInit |
u5, h5, c0, l4, g4, g0, f4, h7 |
|
|
LL_USART_SetBaudRate |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_SetBaudRate |
|
LL_USART_GetBaudRate |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_GetBaudRate |
|
LL_USART_DMA_GetRegAddr |
u5, h5, c0, l4, g4, g0, f4, h7 |
LL_USART_DMA_GetRegAddr |
|
LL_USART_EnableClockInStopMode |
l4 |
Not implemented yet in HAL2. . |
|
LL_USART_DisableClockInStopMode |
l4 |
Not implemented yet in HAL2. . |
|
LL_USART_IsClockEnabledInStopMode |
l4 |
Not implemented yet in HAL2. . |
|
LL_USART_ClearFlag_RXNE |
f4 |
Not implemented yet in HAL2. . |
|
LL_USART_RequestExitMuteMode |
f4 |
Not implemented yet in HAL2. . |
|
LL_USART_ConfigSyncMode |
u5, h5, c0, l4, g4, g0, f4 |
LL_USART_ConfigSyncMasterMode |
|
LL_USART_DisableOneBitSamp |
u5, h5, c0, l4, g4, g0, f4 |
LL_USART_DisableOneBitSample |
|
LL_USART_EnableOneBitSamp |
u5, h5, c0, l4, g4, g0, f4 |
LL_USART_EnableOneBitSample |
|
LL_USART_IsEnabledOneBitSamp |
u5, h5, c0, l4, g4, g0, f4 |
LL_USART_IsEnabledOneBitSample |
|
LL_USART_GetNodeAddressLen |
u5, h5, c0, l4, g4, g0, f4 |
LL_USART_GetNodeAddressLength |